Automata Designs for Data Encryption with AES using the Micron Automata Processor

Cybersecurity has become the most important issue in the current era of cyber warfare. Significant advantages can be obtained from using co-processing units when a cyberattack diminished the computing power of the main processor cores from carried out useful tasks. Automata Processor (AP) is a novel accelerator from Micron Technology, which is based on the non-von Neumann architecture and the processing in memory concept. A series of automata designs for implementing the Advanced Encryption Standard algorithm on the AP board is proposed, validated, compiled, and simulated using AP SDK and AP Workbench. The results demonstrated that the proposed automata designs utilized the available resources on the AP chip efficiently, yielding the maximum degree of concurrencies across all six ranks available on the Micron AP-D480 board. Thus, this paper serves as an exploratory guide to enhance cybersecurity operational capability by using the AP co-processing board.